Second International Workshop on
Future Architectural Support for Parallel Programming
(FASPP'12)
To be held in conjunction with:
the 39th International Symposium on Computer Architecture (ISCA)
June 10, 2012 in Portland, OR, USA
Topics of interest
The ever-growing prevalence of parallel architectures has pushed the inherent difficulties in parallel programming to the front stage, and has stimulated research into novel parallel programming models. However, newly gained knowledge on parallel programming has yet to trickle down to modern architectures, and new manycore chips can largely still be viewed as arrays of sequential processors. In this workshop, we focus at exploring the parallel programmability issue from an architectural perspective. It is our goal to bring together experts in computer architectures, parallel programming, parallel algorithms, and parallel system design, and foster a discussion on the design of future parallel architectures by raising two fundamental questions:
- What parallel abstractions should the hardware provide?
- Which should be the responsability / functionality of the programmer, the runtime software, and the hardware?
We solicit position papers addressing the above questions with respect to all architectural aspects of parallel programming, and specifically:
- enabling future parallel programming models
- innovative architectural execution models
- novel memory hierarchies
- simplified and scalable memory models
- high-level constructs for on-chip communications
- characterization of the runtime overheads of parallel applications
- future directions in programming massively parallel systems
- potential bottlenecks for future parallel systems
FASPP is intended for quick publication of position papers, early results, and work-in-progress, and is not intended to prevent later publication of extended papers. Proceedings with accepted papers will be made available at the workshop and online.
In addition to paper presentations, the workshop will also host a keynote and a panel of experts in computer architecture and parallel programming who will debate the future of parallel architectures.
Important dates
| Submission deadline: | Apr 13, 2012 (23:59 PST) ***EXTENDED*** | |
| Notification to authors: | May 1, 2012 | |
| ISCA advance registration deadline: | May 5, 2012 | |
| Final version of accepted papers: | May 20, 2012 |
Paper submission
Submissions should be formatted according to the IEEEtran conference style
and must not exceed 5 pages using a 10pt font (including all figures and references).
Please follow this link to submit your paper: Submission site.
Organizers
| Yoav Etsion | Technion - Israel Institute of Technology | Israel | yetsion[at]tce.technion.ac.il | |||
| Avi Mendelson | Microsoft
Technion - Israel Institute of Technology |
Israel | avim[at]microsoft.com | |||
| Alex Ramirez | Barcelona Supercomputing Center (BSC)
Universitat Politecnica de Catalunya (UPC) |
Spain | alex.ramirez[at]bsc.es |
Program committee
| Tarek Abdelrahman | Univ. of Toronto | |
| Mats Brorson | KTH | |
| Mattan Erez | UT Austin | |
| David Kirk | Nvidia | |
| Mikel Lujan | Univ. of Manchester | |
| Dimitris Nikolopoulos | Queen's University of Belfast | |
| Mark Oskin | Univ. of Washington | |
| Nikola Puzovic | BSC | |
| Martin Schulz | LLNL | |
| Per Stenstrom | Chalmers |
Webmaster: yetsion[at]tce.technion.ac.il